§ Coming soon · private alpha
Chat your idea. Get the hardware.
Idea → working dev kit → fab-ready board, in one session. We make the modules. The AI composes the rest. Sign-ups are invite-only while we prep the alpha.
§ Usage demo
Chat on the left. Real hardware on the right.
The chat captures intent. The canvas is the project document, rendered. Same data, two views — both stay in sync as the agent works.
you smart bird feeder that IDs species and posts to my server

| qty | mpn | desc | $usd |
|---|---|---|---|
| 1 | E1M-X-V2N | SoM · Renesas RZ/V2N | 78.40 |
| 1 | OV5640-AF | 5 MP MIPI CSI-2 camera | 3.10 |
| 1 | ESP32-C6-MINI-1 | Wi-Fi 6 + BLE 5.3 module | 2.85 |
| 1 | BQ25895 | Li-ion charger, PD support | 2.10 |
| 2 | LP3878 | 3.3 V LDO · low-noise | 1.80 |
| + 13 more · DRC clean | 92.40 | ||
Demo: a user types "smart bird feeder that IDs species and posts to my server". The Alp Studio agent captures intent, recommends an E1M-X V2N SoM, picks camera/wifi/power blocks, selects a 142ms inference model on DRP-AI3, then builds firmware.zip, a 4-layer KiCad project, and an 18-line BOM totalling $92.40.
§ How it works
Three steps. One session.
Natural-language brief in chat. The agent captures intent — workload, constraints, connectivity, target latency.
Agent picks the SoM family, blocks, and model from the curated library. A deterministic allocator resolves the pin map against the published E1M pinout.
Zephyr firmware, KiCad project, schematic PDF, Gerbers, BOM — one bundle, derived from the project document.
§ Under the hood
Three published standards. Not promises.
Open board pinout for AI module-on-module products. Two form factors (35×35 and 45×65 mm), machine-readable JSON Schema.
Description language for module-based AI systems. Form-factor + per-SoM manifest + block manifest + project document. Deterministic pin allocator, not a synthesiser.
Single C/C++ API across every E1M variant on bare metal, Zephyr, and Yocto. Wraps every vendor HAL. Ships the curated library set.
§ Why this works
Pure-vibe tools invent boards. Hardware doesn't tolerate plausible.
Alp ships pre-validated blocks — schematic + pre-routed PCB + firmware driver + bring-up test, all in one manifest. A deterministic allocator resolves the pin map against the published E1M pinout. The agent picks blocks; it never invents a regulator topology.
§ Private alpha · coming soon
We're prepping the alpha.
Drop us a note and we'll loop you in as soon as invites open.
On-premise · custom integration · enterprise pricing — happy to chat.